Currently, a majority of flat panel displays such as LCD, OLED are electrically driven by active-matrix driving system, which typically includes TFT as the switching element. The properties of TFT have great effect on the quality of the display. A reliable TFT with high breakdown voltage and low current leakage is useful to decrease the number of unacceptable displays.
A TFT typically includes an insulating substrate layer, a gate layer, a gate insulator layer, an active semiconductor layer, and a source and drain electrode layer. As the flat panel displays with lower power consumption is developed recently, TFT as the switching element is accordingly required to further lower the power consumption. Thinning the gate insulator film is effective to lower the TFT threshold voltage and thus reduces the power consumption. However, defects such as micro-cracks, pinholes are prone to appear associated with thinning the gate insulator film. These defects provide current leakage paths, which may cause the breakdown voltage lowered, the current leakage increased or even cause TFT short.
To solve this problem, various methods have been proposed in many different kinds of materials such as patents and applications. For example, a Chinese Patent Application (No. 101300681A) discloses a double-layered gate insulator with a silicon oxide film and a silicon nitride film stacked together. As silicon nitride is a high dielectric constant material, the double-layered structure composed of a silicon oxide layer and a silicon nitride layer can facilitate TFT to withstand much higher voltage. However, both complexity and cost of fabricating the two layered structure will increase, because two different chambers are required to respectively deposit the silicon oxide film and the silicon nitride film. Additionally, the interfacial combination between the two layers of different materials may be a concern. Another Chinese Patent Application (No. 101034702A) discloses a gate insulator having a silicon nitride multi-layer laminated structure. The inventor declares that the current leakage can be avoided, as defects in each layer of the multi-layer laminated structure can be randomly arranged and not readily in communication with each other to form the leakage current paths. However, this disclosure may be considered as an ideal conceive.
Thus, there is still a demand for a method for effectively improving the reliability of a gate insulator, a TFT including the reliable gate insulator with low current leakage and high breakdown voltage, and a display including the TFT with high quality and yield.
The above information disclosed in this background section is only for enhancement of understanding of the background of the disclosure and therefore it may contain information that does not form the prior art that is already known to a person of ordinary skill in the art.